Simulation of single-electron/CMOS hybrid circuits using SPICE macro-modeling

The macro-modeling technique of single electron transistors has been applied to the SPICE simulation of single-electron/CMOS hybrid circuits. Several hybrid circuits such as an SET-NMOS pair and a single electron NOR-gate with CMOS buffers have been simulated and efficient interface characteristics have been demonstrated. This technique is simple to perform and does not require any modification of the SPICE internal source code.