SOT-MRAM-Based LUT Cell Design for Area- and Energy-Efficient FPGA

Keyphrases

• Field Programmable Gate Arrays 100%
• Energy Efficient 100%
• Area-efficient 100%
• Cell Design 100%
• SOT-MRAM 100%
• Metal Line 50%
• Reading Speed 33%
• Read Energy 33%
• Multiplexer Tree 33%
• Non-volatile 16%
• Capacitance 16%
• Controller 16%
• Read Operation 16%
• CMOS Process 16%
• Two-cell 16%
• Hardware Resources 16%
• Energy Reduction 16%
• Speed Improvement 16%
• Area Reduction 16%
• Significant Region 16%
• Post-layout Simulation 16%
• Switch number 16%
• 28 Nm CMOS 16%
• Table Design 16%

Engineering

• Energy Engineering 100%
• Lookup Table 100%
• Field Programmable Gate Arrays 100%
• Cell Design 100%
• Multiplexer 20%
• Simulation Result 10%
• Area Reduction 10%