Spatial distribution of interface traps in sub-50-nm recess-channel-type DRAM cell transistors

Eun Ae Chung*, Young Pil Kim, Min Chul Park, Kab Jin Nam, Sung Sam Lee, Ji Young Min, Giyoung Yang, Yu Gyun Shin, Siyoung Choi, Gyoyoung Jin, Joo Tae Moon, Sangsig Kim

*Corresponding author for this work

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