Study of hole traps in the oxide-nitride-oxide structure of the SONOS flash memory

Yu Jeong Seo; Kyoung Chan Kim; Hee Dong Kim; Tae Geun Kim; Ho Myoung An

doi:10.3938/jkps.53.3302

Study of hole traps in the oxide-nitride-oxide structure of the SONOS flash memory

Yu Jeong Seo, Kyoung Chan Kim, Hee Dong Kim, Tae Geun Kim, Ho Myoung An

School of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

14 Citations (Scopus)

Abstract

The origin and the locations of the hole traps in the oxide-nitride-oxide (ONO) structure fabricated on a p-type Si substrate were investigated by using capacitance-voltage (C-V) and deep level transient spectroscopy (DLTS) measurements. The C-V loop was used not only to evaluate the memory effect of the ONO capacitor but also to determine suitable bias conditions for DLTS. Then, hole traps were found to be distributed over energy levels of 0.49 ∼ 0.64 eV above the valence band maximum of Si and their origin was attributed to a combination of nitride and the SiO₂/Si interface by using small-pulse DLTS and filling -bias- dependent DLTS techniques.

Original language	English
Pages (from-to)	3302-3306
Number of pages	5
Journal	Journal of the Korean Physical Society
Volume	53
Issue number	6
DOIs	https://doi.org/10.3938/jkps.53.3302
Publication status	Published - 2008 Dec

Keywords

Charge trap
Hole trap
ONO
SONOS

ASJC Scopus subject areas

Physics and Astronomy(all)

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10.3938/jkps.53.3302

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abstract = "The origin and the locations of the hole traps in the oxide-nitride-oxide (ONO) structure fabricated on a p-type Si substrate were investigated by using capacitance-voltage (C-V) and deep level transient spectroscopy (DLTS) measurements. The C-V loop was used not only to evaluate the memory effect of the ONO capacitor but also to determine suitable bias conditions for DLTS. Then, hole traps were found to be distributed over energy levels of 0.49 ∼ 0.64 eV above the valence band maximum of Si and their origin was attributed to a combination of nitride and the SiO2/Si interface by using small-pulse DLTS and filling -bias- dependent DLTS techniques.",

keywords = "Charge trap, Hole trap, ONO, SONOS",

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AU - Seo, Yu Jeong

AU - Kim, Kyoung Chan

AU - Kim, Hee Dong

AU - Kim, Tae Geun

AU - An, Ho Myoung

PY - 2008/12

Y1 - 2008/12

N2 - The origin and the locations of the hole traps in the oxide-nitride-oxide (ONO) structure fabricated on a p-type Si substrate were investigated by using capacitance-voltage (C-V) and deep level transient spectroscopy (DLTS) measurements. The C-V loop was used not only to evaluate the memory effect of the ONO capacitor but also to determine suitable bias conditions for DLTS. Then, hole traps were found to be distributed over energy levels of 0.49 ∼ 0.64 eV above the valence band maximum of Si and their origin was attributed to a combination of nitride and the SiO2/Si interface by using small-pulse DLTS and filling -bias- dependent DLTS techniques.

AB - The origin and the locations of the hole traps in the oxide-nitride-oxide (ONO) structure fabricated on a p-type Si substrate were investigated by using capacitance-voltage (C-V) and deep level transient spectroscopy (DLTS) measurements. The C-V loop was used not only to evaluate the memory effect of the ONO capacitor but also to determine suitable bias conditions for DLTS. Then, hole traps were found to be distributed over energy levels of 0.49 ∼ 0.64 eV above the valence band maximum of Si and their origin was attributed to a combination of nitride and the SiO2/Si interface by using small-pulse DLTS and filling -bias- dependent DLTS techniques.

KW - Charge trap

KW - Hole trap

KW - ONO

KW - SONOS

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Study of hole traps in the oxide-nitride-oxide structure of the SONOS flash memory

Abstract

Keywords

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