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The design and performance evaluation of the DI-multicomputer
Lynn Choi
*
, Andrew A. Chien
*
Corresponding author for this work
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Keyphrases
Performance Evaluation
100%
Design Evaluation
100%
Multicomputer
100%
Packet Forwarding
50%
High Performance
33%
Short Message
33%
Long Messages
33%
Communication Resources
33%
Internode
33%
Memory Access
16%
Simulation-based
16%
Router
16%
Efficient Communication
16%
Network Routing
16%
Bus Interface
16%
Transmission Overhead
16%
Handling Mechanism
16%
Node Architecture
16%
Memory Interface
16%
Network Interface
16%
Local Memory
16%
Minimum Latency
16%
Multi-packet
16%
Memory Bus
16%
Uniform Points
16%
Message Passing Applications
16%
Processor chips
16%
Trace-driven Simulation
16%
Computer Science
Performance Evaluation
100%
Multicomputers
100%
Communication Resource
33%
Bus Interface
16%
Transmission Overhead
16%
Handling Mechanism
16%
Network Interface
16%
Memory Interface
16%
Message Passing
16%
Local Memory Access
16%
Existing Architecture
16%