The electrical characteristics of high density arrays of silicon nanowire field-effect transistors: Dependence on wire spacing

Hye Young Kim, Kangho Lee, Jae Woo Lee, Sangwook Kim, Gyu Tae Kim, Georg S. Duesberg

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Abstract

    Since the introduction of silicon nanowire field-effect transistors (SiNW FETs) as a new technology for highly integrated circuits, their scaling behavior has been of crucial importance for the continuation of Moore's law. To date most studies have been of a theoretical nature, as small wire spacing is difficult to achieve experimentally. Here we successfully fabricated and investigated arrays of sub 20 nm SiNW FETs with wire spacing as small as 30 nm for the first time. The channels are contacted using global buried Si electrodes. Using the wafer as the back gate an investigation of the electrical performance of an array of SiNW FETs was undertaken. These experimental observations are supported by simulations using FlexPED.

    Original languageEnglish
    Title of host publication2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013
    Pages384-388
    Number of pages5
    DOIs
    Publication statusPublished - 2013
    Event2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013 - Beijing, China
    Duration: 2013 Aug 52013 Aug 8

    Publication series

    NameProceedings of the IEEE Conference on Nanotechnology
    ISSN (Print)1944-9399
    ISSN (Electronic)1944-9380

    Other

    Other2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013
    Country/TerritoryChina
    CityBeijing
    Period13/8/513/8/8

    ASJC Scopus subject areas

    • Bioengineering
    • Electrical and Electronic Engineering
    • Materials Chemistry
    • Condensed Matter Physics

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