Tile-based code generation for efficiently accessing to scratchpad memory

Jaewook Lee; Yoonah Paik; Seon Wook Kim

doi:10.1109/ICEIC51217.2021.9369731

Tile-based code generation for efficiently accessing to scratchpad memory

Jaewook Lee, Yoonah Paik, Seon Wook Kim

School of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Most accelerators have used scratchpad memory (SPM) as software-managed working storage. However, the large amount of data used in recent applications like deep learning is hard to fit in the limited storage. It causes a significant burden to a programmer who should efficiently software-manage the SPM. This paper introduces a tile-based code generation for efficiently managing and executing an SPM by modifying Polly's loop tiling in LLVM, i.e., a polyhedral optimization library. For the performance analysis, we analyze the SPM copy overhead depending on a tiling factor.

Original language	English
Title of host publication	2021 International Conference on Electronics, Information, and Communication, ICEIC 2021
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728191614
DOIs	https://doi.org/10.1109/ICEIC51217.2021.9369731
Publication status	Published - 2021 Jan 31
Event	2021 International Conference on Electronics, Information, and Communication, ICEIC 2021 - Jeju, Korea, Republic of Duration: 2021 Jan 31 → 2021 Feb 3

Publication series

Name	2021 International Conference on Electronics, Information, and Communication, ICEIC 2021

Conference

Conference	2021 International Conference on Electronics, Information, and Communication, ICEIC 2021
Country/Territory	Korea, Republic of
City	Jeju
Period	21/1/31 → 21/2/3

Keywords

Compiler Optimization
LLVM
Loop Tiling
Polly
Scratchpad Memory

ASJC Scopus subject areas

Artificial Intelligence
Computer Networks and Communications
Information Systems
Information Systems and Management
Electrical and Electronic Engineering
Instrumentation

Access to Document

10.1109/ICEIC51217.2021.9369731

Cite this

Lee, J., Paik, Y., & Kim, S. W. (2021). Tile-based code generation for efficiently accessing to scratchpad memory. In 2021 International Conference on Electronics, Information, and Communication, ICEIC 2021 [9369731] (2021 International Conference on Electronics, Information, and Communication, ICEIC 2021). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICEIC51217.2021.9369731

Tile-based code generation for efficiently accessing to scratchpad memory. / Lee, Jaewook; Paik, Yoonah; Kim, Seon Wook.
2021 International Conference on Electronics, Information, and Communication, ICEIC 2021. Institute of Electrical and Electronics Engineers Inc., 2021. 9369731 (2021 International Conference on Electronics, Information, and Communication, ICEIC 2021).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Lee, J, Paik, Y & Kim, SW 2021, Tile-based code generation for efficiently accessing to scratchpad memory. in 2021 International Conference on Electronics, Information, and Communication, ICEIC 2021., 9369731, 2021 International Conference on Electronics, Information, and Communication, ICEIC 2021, Institute of Electrical and Electronics Engineers Inc., 2021 International Conference on Electronics, Information, and Communication, ICEIC 2021, Jeju, Korea, Republic of, 21/1/31. https://doi.org/10.1109/ICEIC51217.2021.9369731

Lee J, Paik Y, Kim SW. Tile-based code generation for efficiently accessing to scratchpad memory. In 2021 International Conference on Electronics, Information, and Communication, ICEIC 2021. Institute of Electrical and Electronics Engineers Inc. 2021. 9369731. (2021 International Conference on Electronics, Information, and Communication, ICEIC 2021). doi: 10.1109/ICEIC51217.2021.9369731

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abstract = "Most accelerators have used scratchpad memory (SPM) as software-managed working storage. However, the large amount of data used in recent applications like deep learning is hard to fit in the limited storage. It causes a significant burden to a programmer who should efficiently software-manage the SPM. This paper introduces a tile-based code generation for efficiently managing and executing an SPM by modifying Polly's loop tiling in LLVM, i.e., a polyhedral optimization library. For the performance analysis, we analyze the SPM copy overhead depending on a tiling factor.",

keywords = "Compiler Optimization, LLVM, Loop Tiling, Polly, Scratchpad Memory",

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N2 - Most accelerators have used scratchpad memory (SPM) as software-managed working storage. However, the large amount of data used in recent applications like deep learning is hard to fit in the limited storage. It causes a significant burden to a programmer who should efficiently software-manage the SPM. This paper introduces a tile-based code generation for efficiently managing and executing an SPM by modifying Polly's loop tiling in LLVM, i.e., a polyhedral optimization library. For the performance analysis, we analyze the SPM copy overhead depending on a tiling factor.

AB - Most accelerators have used scratchpad memory (SPM) as software-managed working storage. However, the large amount of data used in recent applications like deep learning is hard to fit in the limited storage. It causes a significant burden to a programmer who should efficiently software-manage the SPM. This paper introduces a tile-based code generation for efficiently managing and executing an SPM by modifying Polly's loop tiling in LLVM, i.e., a polyhedral optimization library. For the performance analysis, we analyze the SPM copy overhead depending on a tiling factor.

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Tile-based code generation for efficiently accessing to scratchpad memory

Abstract

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Keywords

ASJC Scopus subject areas

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