Abstract
A route to the top-down fabrication of highly ordered and aligned silicon nanowire (SiNW) arrays with degenerately doped source/drain regions from a bulk Si wafer is presented. In this approach, freestanding n- and p-SiNWs with an inverted triangular cross section are obtained using conventional photolithography, crystal orientation dependent wet etching, size reduction oxidation, and ion implantation doping. Based on these n- and p-SiNWs transferred onto a plastic substrate, simple SiNW-based complementary metal-oxide-semiconductor (CMOS) inverters are constructed for the possible applications of these SiNW arrays in integrated circuits on plastic. The static voltage transfer characteristic of the SiNW-based CMOS inverter exhibits a voltage gain of ∼9 V/V and a transition of 0.32 V at an operating voltage of 1.5 V with a full output voltage swing between 0 V and VDD, and its mechnical bendability indicates good fatigue properties for potential applications of flexible electronics. This novel top-down approach is fully compatible with the current state-of-the-art Si-based CMOS technologies and, therefore, offers greater flexibility in device design for both high-performance and low-power functionality.
Original language | English |
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Pages (from-to) | 2629-2636 |
Number of pages | 8 |
Journal | ACS nano |
Volume | 5 |
Issue number | 4 |
DOIs | |
Publication status | Published - 2011 Apr 26 |
Keywords
- CMOS compatibility
- CMOS inverter
- field-effect transistor
- ion implantation
- plastic
- silicon nanowire
ASJC Scopus subject areas
- Materials Science(all)
- Engineering(all)
- Physics and Astronomy(all)