Ultra thin packaging of the RF-MEMS devices with low loss

Yuh Kwon Park, Yong Kook Kim, Hoon Kim, Duck Jung Lee, Heung Woo Park, Chul Ju Kim, Byeong Kwon Ju

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The importance of the thinning technology of silicon wafer is increasing in the MEMS packaging and the semiconductor packaging area. One of the packaging technique trying to do newly is 3D packaging with light weight and low cost. In this work, as ultra thin silicon substrate which has thickness of 50μm was used as capping substrate, we proposed ultra thin chip size RF-MEMS packaging technology that has vertical feed-through, ultra thin thickness (<5μm), hermetic sealing and low loss. Hence, it results in high increased density with reduced volume, and the interconnection dramatically shortened which can significantly improve the performance. The fabricated via hole size of front side was increased 10μm as 60μm and that of back side was reduced 10um as 40μm. The insertion loss of the packaged CPW was 0.54-0.67 dB.

Original languageEnglish
Title of host publication2003 Nanotechnology Conference and Trade Show - Nanotech 2003
EditorsM. Laudon, B. Romanowicz
Pages384-387
Number of pages4
Publication statusPublished - 2003
Externally publishedYes
Event2003 Nanotechnology Conference and Trade Show - Nanotech 2003 - San Francisco, CA, United States
Duration: 2003 Feb 232003 Feb 27

Publication series

Name2003 Nanotechnology Conference and Trade Show - Nanotech 2003
Volume2

Other

Other2003 Nanotechnology Conference and Trade Show - Nanotech 2003
Country/TerritoryUnited States
CitySan Francisco, CA
Period03/2/2303/2/27

Keywords

  • Packaging
  • RF-MEMS
  • Thin wafer

ASJC Scopus subject areas

  • Engineering(all)

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