Abstract
We present a universal metal-interlayer-semiconductor (MIS) contact model to demonstrate the effect of Fermi-level unpinning, considering both the extrinsic interface-state density (Dit) and the density of metal-induced gap states (DMIGS) at the semiconductor surface. Previous studies on MIS contact modeling have quantified only the impact of DMIGS on Fermi-level pinning. However, the extrinsic interface states such as interface traps and local vacancies significantly affect the contact resistivity degradation in MIS contacts. Moreover, field emission (FE) and thermionic FE (TFE) current density models in MIS contact are described in detail, for the extraction of the specific contact resistivity (ρc). The physical validity of the proposed model is demonstrated by comparing its calculated ρc with those obtained in prior experimental studies employing a GaAs substrate (Ti/ZnO/n-GaAs and Ti/TiO2/n-GaAs). The ρc values for the MIS contacts are also evaluated with variousDit levels and the interlayers. This model is promising for the development of a comprehensive next-generation MIS contact for the sub-10-nm complementary metal-oxide-semiconductor technology.
Original language | English |
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Article number | 8466861 |
Pages (from-to) | 4982-4987 |
Number of pages | 6 |
Journal | IEEE Transactions on Electron Devices |
Volume | 65 |
Issue number | 11 |
DOIs | |
Publication status | Published - 2018 Nov |
Bibliographical note
Funding Information:Manuscript received June 11, 2018; revised August 3, 2018 and August 16, 2018; accepted September 1, 2018. Date of publication September 17, 2018; date of current version October 22, 2018. This work was supported in part by the National Research Foundation of Korea funded by the Ministry of Science, ICT and Future Planning through the Basic Science Research Program under Grant 2017R1A2B4006460, in part by the Ministry of Trade, Industry and Energy, South Korea, through the Technology Innovation Program under Grant 10052804, in part by the National Research Foundation of Korea funded by the Ministry of Science, ICT and Future Planning through the Nano Material Technology Development Program under Grant 2015M3A7B7045490, and in part by the IC Design Education Center, Korea Advanced Institute for Science and Technology, Daejeon, South Korea. The review of this paper was arranged by Editor K. Kalna. (Jeong-Kyu Kim and Seung-Hwan Kim contributed equally to this work). (Corresponding author: Hyun-Yong Yu.) J.-K. Kim, S.-H. Kim, and H.-Y. Yu are with the School of Electrical Engineering, Korea University, Seoul 02841, South Korea (e-mail: [email protected]).
Publisher Copyright:
© 2018 IEEE.
Keywords
- Complementary metal-oxide-semiconductor (CMOS)
- Fermi-level unpinning
- contact resistance
- interface state
- metal-induced gap state (MIGS)
- specific contact resistivity
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering