Variability-insensitive scheme for NAND flash memory interfaces

C. I. Son, S. Yoon, S. W. Chung, C. I. Park, E. Y. Chung

Research output: Contribution to journalArticlepeer-review


A novel NAND flash memory interface (NFMI) scheme to cope with uncertainty due to process, voltage and temperature (PVT) variations is proposed. The new NFMI scheme introduces a signal called data valid strobe to replace the signal read enable bar, which is a read strobe in the standard NFMI protocol. Experimental results show that the proposed scheme is insensitive to PVT variations, unlike the existing NFMI scheme, and hence substantially increases system performance as well as reliability.

Original languageEnglish
Pages (from-to)1335-1337
Number of pages3
JournalElectronics Letters
Issue number23
Publication statusPublished - 2006

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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