Abstract
The 40nm CMOS WLAN transceiver which support 802.11 a/b/g/n/ac dual band with integrated power amplifier is implemented. The transceiver covers 2.4GHz band and 5GHz band for 802. 11a/b/g/n/ac. The wireless transceiver includes RF Transceiver, power amplifier, LO generator and high speed data converter. To achieve better LO phase balance and lower power consumption, the harmonic VCO frequency is adopted and the power amplifier and the VCO were sufficiently isolated to prevent degradation of LO performance at high power. To compensate LO power attenuation, LC tuning is proposed. The transceiver is fabricated using 40nm CMOS process with 5.4mm2 die area. The power consumption of 802.11ac is about 160mW and 180mW for 2.4GHz receiver mode and transceiver mode except PA respectively and 170mW and 190mW for 5GHz case. The maximum PA output power 20.1dBm with 4.4% EVM without LO pulling. The 802.11 a/b/g/n/ac receiver noise figure is 2.7B and 3.3dB at 2.4∼2.5GHz band and 4.8∼5.7GHz band.
Original language | English |
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Title of host publication | Proceedings - International SoC Design Conference 2017, ISOCC 2017 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 81-82 |
Number of pages | 2 |
ISBN (Electronic) | 9781538622858 |
DOIs | |
Publication status | Published - 2018 May 29 |
Event | 14th International SoC Design Conference, ISOCC 2017 - Seoul, Korea, Republic of Duration: 2017 Nov 5 → 2017 Nov 8 |
Publication series
Name | Proceedings - International SoC Design Conference 2017, ISOCC 2017 |
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Other
Other | 14th International SoC Design Conference, ISOCC 2017 |
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Country/Territory | Korea, Republic of |
City | Seoul |
Period | 17/11/5 → 17/11/8 |
Bibliographical note
Publisher Copyright:© 2017 IEEE.
Keywords
- 802.11a/b/g/n/ac
- Power amplifier
- VCO
- WLAN
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials